| DFT engineer - Remote at Remote, Remote, USA |
| Email: [email protected] |
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https://jobs.nvoids.com/job_details.jsp?id=2029772&uid= From: Subodh Kumar, TEK INSPIRATIONS LLC [email protected] Reply to: [email protected] Job Description - Job Title- DFT engineer Location- United States (Remote) Duration- 12 months JOB DESCRIPTION- Broadcom Perm Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration Working closely with STA and DI Engineers design closure for test Generating, Verifying & Debugging Test vectors before tape release. Validating & Debugging Test vectors on ATE during the silicon bring up phase Assisting with silicon failure analysis, diagnostics & yield improvement efforts Interfacing with the customer, physical design and test engineering/manufacturing teams located globally Working closely with I/P DFT engineers & other stakeholders Debugging customer returned parts on the ATE Innovating newer DFT solutions to solve testability problems in 7nm & beyond Automating DFT & Test Vector Generation flows Skills/Experience: Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others) Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.) Logic BIST design and debug experience Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan) Experience in Verilog coding, testbench generation & simulation Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM) Boundary scan Verification and test vector generation. Should have good knowledge in IEEE1149.1 and IEEE1149.6 Basic knowledge Test-STA and constraints Strang background on IEE1687, IJTAG, ICL and PDL The ability to work in a multi-disciplined, cross-department environment Solid knowledge in analog and digital circuit design, and device physics fundamentals Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles Excellent problem solving, debug , root cause analysis and communication skills Experience working on ATE is a plus Experience with Serdes, DDR, PCIE, ENET, CXL IOBIST verification and silicon debug is a plus Experience working on Tessent SSN is a plus Keywords: DFT engineer - Remote [email protected] https://jobs.nvoids.com/job_details.jsp?id=2029772&uid= |
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| 12:21 AM 20-Dec-24 |